VIA Technologies EPIA-PN Uživatelský manuál

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user manual
EPIA-P820
Pico-ITX Mainboard
Revision
1.07
10
7
-
0
621
2012
-
1150
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Strany 1 - EPIA-P820

user manual EPIA-P820 Pico-ITX Mainboard Revision 1.07 107-06212012-1150

Strany 2 - Disclaimer

X Parallel Channel Enable ...63 ISA Master Support...

Strany 4 - Safety Precautions

1 1 Product Overview

Strany 5 - Box Contents

2 The VIA EPIA-P820 is an ultra-compact and highly integrated Pico-ITX mainboard and the smallest stand-alone form-factor available today. Thro

Strany 6 - ABLE OF

3 MAINBOARD SPECIFICATIONS CPU VIA Nano 1.2 GHz NanoBGA2 processor • 800 MHz Front Side Bus Chipset VIA VX855 All-in-One System Processor Graphics

Strany 7

4 EPIA-P820 LAYOUT Top Side SymbolSymbolSymbolSymbol DescriptionDescriptionDescriptionDescription SymbolSymbolSymbolSymbol Descript

Strany 8

5 Bottom Side SymbolSymbolSymbolSymbol DescriptionDescriptionDescriptionDescription SymbolSymbolSymbolSymbol Description

Strany 9

6 P820-A I/O MODULE LAYOUT The VIA EPIA-P820 Pico-ITX mainboard is bundled with an I/O board (P820-A) to support connections to LAN, VGA and USB. Fr

Strany 10

7 DEVELOPMENT KIT ACCESSORIES DC-In Cable The DC-In power cable provides a means to connect to the power brick. Power Brick The power brick provides

Strany 12 - Product Overview

II Copyright and Trademarks Copyright © 2010-2012 VIA Technologies Incorporated. All rights reserved. No part of this document may be reproduced, t

Strany 13 - KEY COMPONENTS

9 2 Onboard Connectors, Slots and Pin Headers This chapter provides you with information about hardware installation procedures. It is r

Strany 14 - MAINBOARD SPECIFICATIONS

10 TOP SIDE CONNECTORS VIA Nano 1.2 GHz processor with Heatsink The VIA EPIA-P820 Pico-ITX mainboard is packaged with a standard VIA Nano 1.

Strany 15 - EPIA-P820 LAYOUT

11 DC-In Power connector: PWR1 EPIA-P820 has an onboard DC-In 2-pin power connector to connect the DC-In power cable. Pin Signal 1 DC In (+12V) 2

Strany 16

12 Serial ATA connector: SATA1 The current SATA interface allows a data transfer rate of up to 300 MB/s — approximately 225% faster than Ultra DMA p

Strany 17 - P820-A I/O MODULE LAYOUT

13 IDE pin header: IDE1 The mainboard has an Ultra DMA 133/100 controller. You can connect up to two IDE devices in any combination. Pin Signal Pi

Strany 18 - DEVELOPMENT KIT ACCESSORIES

14 Ethernet LAN pin header: CN3 The Ethernet LAN pin header is for connecting to the P820-A I/O module. Pin Signal Pin Signal 1 A3V3

Strany 19

15 VGA and USB pin header: VGA_USB1 The VGA and USB pin header is for connecting to the P820-A I/O module. Pin Signal Pin Signal 1

Strany 20 - Connectors, Slots

16 Front Audio pin header: CN1 This pin header allows you to connect a front audio to the mainboard. Pin Signal Pin Signal 1 LINE IN_R

Strany 21 - TOP SIDE CONNECTORS

17 USB pin header: CN2 This 20-pin USB pin header allows you to connect up to four USB2.0 ports. Pin Signal Pin Signal 1 GND 2 GND

Strany 22 - Pin Signal

18 Front Panel and PS/2 KBMS pin header: CN4 This single pin header allows you to connect the power switch, reset switch, power LED, HDD LED, case s

Strany 23

III Regulatory Compliance FCC-A Radio Frequency Interference Statement This equipment has been tested and found to comply with the limits for a clas

Strany 24 - Signal Pin

19 LPC, SMBus and Digital I/O pin header: CN5 This single pin header allows the connection of LPC, SMBus devices and the Digital Input and Output.

Strany 25

20 UART port 2: J1 UART offers TTL level serial signal for the user to easily convert to support RS232/RS422/RS485. (Pin

Strany 26

21 BOTTOM SIDE CONNECTOR UART port 1: J2 UART offers TTL level serial signal for the user to easily convert to support RS232/RS422/RS485.

Strany 27

22 LVDS Panel connector: LVDS1 The single-channel LVDS connector allows you to connect the panel’s LVDS cable directly to support LVDS panel.

Strany 28

23 External Battery: BAT1 The mainboard comes with external CMOS battery connector. This 2-pin connector used to connect the external cable battery

Strany 29

24 Memory Module Installation Memory Slot: SODIMM1 The VIA EPIA-P820 Pico-ITX mainboard has one 200-SODIMM slot for DDR2 667/533 SDRAM memory module

Strany 30

25 Installing the memory Step 1Step 1Step 1Step 1 Locate the SODIMM slot in the mainboard and align the notch on the SODIMM with the memory

Strany 31 - Pin UART Signal

26 PIN HEADER AND CONNECTOR VENDOR LISTS ItemsItemsItemsItems FunctionFunctionFunctionFunction PinPinPinPin PitchPitchPitchPitch Ven

Strany 33

28 Clear CMOS jumper: JM1 The onboard CMOS RAM stores system configuration data and has an onboard battery power supply. To reset the CMOS settings,

Strany 34 - External Battery: BAT1

IV Safety Precautions Do’s o Always read the safety instructions carefully. o Keep this User's Manual for future reference. o All cauti

Strany 35 - Slot Module Size Total

29 LCD Panel Power Selector: JM2 This jumper determines the input voltage for the LCD connector. Setting 1 2 3 +5V ON ON OFF +3.3V (default)

Strany 37 - VENDOR LISTS

31 4 P820-A I/O Module Installation

Strany 38 - Onboard Jumpers

32 P820-A INSTALLATION PROCEDURE Step 1Step 1Step 1Step 1 Align and mount the P820-A board. Step 2Step 2Step 2Step 2 Align the CON1 (VGA &

Strany 39 - Setting 1 2 3

33 Step 3Step 3Step 3Step 3 Then gently press down until the pins on the EPIA-P820 mainboard have been fully inserted into the CON1 and CON2 conn

Strany 41

35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions.

Strany 42 - Module Installation

36 ENTERING THE BIOS SETUP MENU Power on the computer and press <DeleteDeleteDeleteDelete> during the beginning of the boot sequence to enter

Strany 43 - INSTALLATION PROCEDURE

37 GETTING HELP The BIOS setup program provides a “General HelpGeneral HelpGeneral HelpGeneral Help” screen. You can display this screen from any m

Strany 44

38 MAIN MENU AMIBIOS BIOS version number and related information. Processor CPU information. System Memory Memory size. System Time Use the key “+”

Strany 45

V Box Contents  1 x EPIA-P820 Pico-ITX mainboard  1 x P820-A I/O module board  1 x SATA cable  1 x SATA power cable  1 x DC-In cable

Strany 46 - BIOS Setup

39 ADVANCED SETTINGS CPU Configuration IDE Configuration ACPI Configuration APM Configuration Spread Spectrum Configuration USB Configuration

Strany 47 - CONTROL KEYS

40 CPU CONFIGURATION CMPXCHG8B instruction support Settings: [Enabled, Disabled] Nano CPU Thermal Monitor Adjust Settings: [Disabled, Thermal Monit

Strany 48 - GETTING HELP

41 IDE CONFIGURATION Parallel ATA IDE Controller Settings: [Disabled, Primary] Hard Disk Write Protect Settings: [Disabled, Enabled] IDE Detect Tim

Strany 49 - MAIN MENU

42 IDE DRIVES Primary IDE Master Primary IDE Slave (SATA Device) Type Settings: [Not Installed, Auto, CD/DVD, ARMD] LBA/Large Mode Settings: [Dis

Strany 50 - ADVANCED SETTINGS

43 Block (Multi-Sector Transfer) Settings: [Disabled, Auto] PIO Mode Settings: [Auto, 0, 1, 2, 3, 4] DMA Mode Settings: [Auto] S.M.A.R.T. Self Monit

Strany 51 - CPU CONFIGURATION

44 ACPI SETTINGS General ACPI Configuration This menu contains ACPI (Advanced Configuration and Power Management Interface) options. Advanced ACPI

Strany 52 - IDE CONFIGURATION

45 GENERAL ACPI CONFIGURATION Suspend Mode Select the ACPI state used for system suspend. Settings Description S1(POS) S1/Power On Suspend (POS)

Strany 53 - IDE DRIVES

46 ADVANCED ACPI CONFIGURATION ACPI Version Features To enable RSDP pointers to 64-bit Fixed System Description Tables. Settings: [ACPI v1.0, ACPI

Strany 54 - 32Bit Data Transfer

47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings: [Disabled, Enabled]

Strany 55 - ACPI SETTINGS

48 APM CONFIGURATION Power Management / APM Settings: [Disabled, Enabled] Power Button Mode Settings: [On/Off, Standby, Suspend] Suspend Power Savi

Strany 56 - GENERAL ACPI CONFIGURATION

VI TABLE OF CONTENTS 1 Product Overview... 1 Key Compon

Strany 57 - ADVANCED ACPI CONFIGURATION

49 System Thermal Settings: [Disabled, Enabled] Standby Time Out Settings: [Disabled, 1/2/4/8/10/20/30/40/50/60 minutes] Suspend Time Out Settings:

Strany 58 - CHIPSET ACPI CONFIGURATION

50 Resume on Ring Settings: [Disabled, Enabled] Resume on PME# Settings: [Disabled, Enabled] Resume On PS/2 KBC Settings: [Disabled, S3, S3/S4/S5] W

Strany 59 - APM CONFIGURATION

51 SPREAD SPECTRUM CONFIGURATION Spread Spectrum Configuration Settings: [Disabled, 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, 0.6%, 0.7%, 0.8%, 0.9%]

Strany 60

52 USB CONFIGURATION USB 1.1 Ports Configuration To enable USB 1.1 host controllers. Settings: [Disabled, USB 2 ports, USB 4 ports, USB 6 ports] US

Strany 61

53 ADVANCED PCI/PNP SETTINGS Note: This section covers some very technical items and it is strongly recommended to leave the default settings as i

Strany 62 - PREAD SPECTRUM CONFIGURATION

54 PCI IDE BusMaster Settings: [Disabled, Enabled] Off Board PCI/ISA IDE Card Settings: [Auto, PCI Slot1, PCI Slot2, PCI Slot3, PCI Slot4, PCI Slot5

Strany 63 - USB CONFIGURATION

55 BOOT SETTINGS Boot Settings Configuration Configuration settings during system boot. Boot Device Priority Specifies the boot device priority seq

Strany 64 - ADVANCED PCI/PNP SETTINGS

56 BOOT SETTINGS CONFIGURATION Quick Boot Settings: [Disabled, Enabled] Display Logo Settings: [Disabled, Enabled] AddOn ROM Display Mode Settings:

Strany 65 - Reserved Memory Size

57 Interrupt 19 Capture Settings: [Disabled, Enabled]

Strany 66 - BOOT SETTINGS

58 BOOT DEVICE PRIORITY 1st Boot Device To specifies the boot sequence from the available devices. The available boot devices are detected dynamic

Strany 67 - BOOT SETTINGS CONFIGURATION

VII Pin Header and Connector Vendor Lists...26 3 Onboard Jumpers ...

Strany 68 - Interrupt 19 Capture

59 SECURITY SETTINGS Change Supervisor Password This option is for setting a password for entering BIOS Setup. When a password has been set, a pas

Strany 69 - BOOT DEVICE PRIORITY

60 ADVANCED CHIPSET SETTINGS Caution: The Advanced Chipset Features menu is used for optimizing the chipset functions. Do not change these setti

Strany 70 - SECURITY SETTINGS

61 NORTH BRIDGE VIA VX855 CONFIGURATION Software Reset E2 Issue Settings: [Patch, Escape Patch] Change DCLK using RDCKM Settings: [Program, Escape

Strany 71 - ADVANCED CHIPSET SETTINGS

62 ONCHIP VGA CONFIGURATION VGA Frame Buffer Size Settings: [64MB, 128MB, 256MB] CPU Direct Access Frame Buffer Settings: [Disabled, Enabled] Selec

Strany 72 - CONFIGURATION

63 SOUTH BRIDGE VIA VX855 CONFIGURATION Parallel Channel Enable Settings: [Enabled, Disabled] ISA Master Support Settings: [Support, Not Support] H

Strany 73 - ONCHIP VGA CONFIGURATION

64 PCI Delay Transaction Settings: [Disabled, Enabled] WATCH-DOG Settings: [Disabled, Enabled]

Strany 74 - SOUTH BRIDGE VIA VX855

65 EXIT OPTIONS Save Changes and Exit Exit system setup after saving the changes, or press “F10”. Discard Changes and Exit Exit system setup withou

Strany 76 - EXIT OPTIONS

67 6 Driver Installation .

Strany 77

68 MICROSOFT DRIVER SUPPORT The VIA EPIA-P820 mainboard is compatible with Microsoft operating systems. The latest Windows drivers can be downloaded

Strany 78 - Driver Installation

VIII Advanced ACPI Configuration.....44 Chipset ACPI Configuration ...

Strany 79 - LINUX DRIVER SUPPORT

IX Plug & Play O/S.......................53 PCI Latency Timer....

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